1. Field of the Invention
The present invention relates to a field effect transistor suitably used in a nonvolatile memory such as an EEPROM (Electrically Erasable/Programmable Read Only Memory) and a method of manufacturing the same, and a semiconductor memory device using the transistor.
2. Description of the Prior Art
If an electric field is applied to a ferroelectric material such as PZT (lead(Pb) Zirconate Titanate), there occurs a state where the direction of polarization is aligned in the direction of the electric field. This state remains after the electric field is removed. That is, polarization in the ferroelectric material displays hysteresis relative to the application of the electric field. Consequently, it is possible to construct a nonvolatile memory device by utilizing such hysteresis.
The memory device using the ferroelectric material is described in, for example, U.S. Pat. No. 3,832,700, a document entitled "PbTiO.sub.3 Thin Film Gate Nonvolatile Memory FET", 1979 Proceedings of the 2nd Meeting on Ferroelectric Materials and Their Applications F-8, pp. 239-244, and a document entitled ""MFS FET"--A New Type of Nonvolatile Memory Switch Using PLZT Film", Proceedings of the 9th Conference on Solid State Devices, Tokyo, 1977; Japanese Journal of Applied Physics, Volume 17 (1978) Supplement 17-1, pp. 209-214.
In the memory device described in the documents, a field effect transistor constructed as shown in a simplified diagram of FIG. 13 so as to store information. That is, a ferroelectric film 3 is formed as a gate insulation film on the surface of a P-type silicon substrate 2 on which an N.sup.+ -type impurity region having a high concentration 1 serving as a source region and a drain region are formed. A gate electrode 4 is formed on the ferroelectric film 1.
For example, when the substrate 2 is brought into a ground potential level and a positive write voltage VP is applied to the gate electrode 4, polarization shown in FIG. 13 (a) is brought about in the ferroelectric film 3. Therefore, electrons which are minority carriers are attracted to the surface of the P-type silicon substrate 2, to form a channel 5. Consequently, a conduction state occurs between the source and the drain. The polarization in the ferroelectric film 3 is held after the write voltage VP is removed. Accordingly, a state where the channel 5 is formed is maintained even after the write voltage VP is removed.
On the other hand, if a negative erase voltage -VE is applied to the gate electrode 4, polarization in the opposite direction to that at the time of application of the write voltage VP is brought about in the ferroelectric film 3, as shown in FIG. 13 (b). Consequently, the channel 5 disappears, so that a non-conduction state occurs between the source and the drain. This state is maintained even after the erase voltage -VE is removed.
Two states such as a writing state and an erasing state can be thus set depending on the presence or absence of the channel 5, thereby to make it possible to store information. The stored information can be read out by examining whether the transistor is conductive or non-conductive.
However, the following problems arise in the abovementioned construction. That is, in the above-mentioned field effect transistor, the ferroelectric film 3 is formed in contact with the surface of the P-type silicon substrate 2. Therefore, a metal such as Pb in the ferroelectric film 3 is diffused in the silicon substrate 2 at the time of heat treatment in the diffusion process, the thin film formation process and the like for device formation, and the surface of the silicon substrate 2 is oxidized at the time of forming the ferroelectric film 3. Therefore, the characteristics as the field effect transistor are degraded.